LEARNER V3.0 – A Strategic Orientation for Success
The Placement Cell of Sree Narayana Guru College of Engineering & Technology (SNGCET), Payyanur, is conducting LEARNER V3.0 – A Strategic Orientation for Success, a comprehensive orientation programme for S5 students, in association with CraftSuccess – Trainers & Mentors, from 22 September to 29 September 2026. The programme is designed to help students understand the gap between academic learning and industry expectations and to prepare them for their future career and higher studies. The sessions focus on industry readiness, academic excellence, career planning, internship opportunities, and higher studies. Through strategic guidance and expert mentoring, the programme aims to motivate students to strengthen their academic performance, develop a clear career direction, gain relevant industry exposure, and become better prepared for future professional opportunities. The initiative reflects the Placement Cell's commitment to equipping students with the knowledge, awareness, and confidence required to successfully transition from campus to career.

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ETA Technologies, Bangalore
Campus Recruitment Drive – 2026
Date: 19 September 2026
Venue: SNGCET Campus
Eligibility: S7 Students
Opportunity:
• 6-Month Internship
• Selection process conducted at the college
• Shortlisted candidates will attend the final round at the ETA Technologies campus, Bangalore
• On successful completion of the internship, selected candidates will be offered Full-Time Employment
• CTC: ₹3 LPA
Important Note:
As per the internship terms, students who discontinue the internship before completion will be required to return the stipend equivalent to three months.
Please make the poster professional, attractive, and suitable for circulation among students through WhatsApp and other official channels.

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The Training & Placement Cell of Sree Narayana Guru College of Engineering & Technology, Payyanur, conducted the NITC Aspire Programme – Career Guidance & Industry Awareness Programme for ECE students on 16 September 2026, from 10:00 AM to 12:00 PM. The session was handled by Mr. Gouthaman P.K., B.Tech (Hons), NIT Calicut, MS (IT), Former Senior Director, Etisalat, Dubai. The programme provided students with valuable insights into career opportunities, industry expectations, professional growth, and career planning, helping them develop greater awareness of the pathways available in the engineering and technology sector.

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The Training & Placement Cell of Sree Narayana Guru College of Engineering & Technology, Payyanur, organized the NITC Aspire Programme – Career Guidance & Industry Awareness Programme on 15 September 2026. The programme was conducted for Civil Engineering and Mechanical Engineering students, with Sri. Ramesan K, M.Tech (IIT Madras), Retired Executive Engineer, KWA, Government of Kerala, and Sri. M. Suresh Babu, B.Sc. (Engg.), NIT Calicut, MBA, former General Manager, Western India Plywoods, serving as resource persons. The programme focused on providing students with career guidance, industry awareness, and insights into professional opportunities.

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The Training and Placement Cell of Sree Narayana Guru College of Engineering & Technology, Payyanur, organized a Tech Coding Training Session for S7 students of all branches from 14 to 16 September 2026, from 9:00 AM to 4:00 PM. The three-day training programme was conducted by Neovent Innovations, Kochi, under the guidance of Mr. Athul Mohan, Founder & CEO, Neovent Innovations Kochi. The programme focused on strengthening students’ coding skills, technical knowledge, problem-solving abilities, and industry readiness, thereby enhancing their preparedness for recruitment and placement opportunities.

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The Placement Cell of Sree Narayana Guru College of Engineering & Technology, Payyanur, conducted an Aptitude and Verbal Training Programme on 14 August 2026. The training was conducted by Neovent Training, led by Ms. Poornima and Mr. Bhanu. The programme focused on enhancing students’ aptitude, verbal ability, logical reasoning, and overall preparation for recruitment and placement drives.

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The Hobby Club of Sree Narayana Guru College of Engineering & Technology (SNGCET), Payyannur, organized a Reels Competition with the theme “Between the Bells”, encouraging students to creatively capture meaningful moments from their campus life. The competition aimed to highlight the idea that “Life happens in the moments between”, inspiring participants to showcase unseen, candid, and expressive stories through short video content. A total of five students actively participated in the event, each presenting unique and creative interpretations aligned with the theme. The entries were evaluated based on creativity, storytelling, relevance to the theme, and overall presentation. The competition witnessed enthusiastic participation and appreciation from the student community. The winners of the competition are as follows: First Prize: Muhammed Rizvan MA (S2 ME) Second Prize: Devang TD (S2 CSE) Third Prize: Adwaith K (S4 EEE) The prize distribution ceremony was conducted during the prestigious SATVI – College Day Celebration held on 27th March 2026, where the winners were honored and appreciated for their creative excellence. The event successfully provided a platform for students to express their perspectives through digital media and encouraged artistic storytelling within the campus. Overall, the Reels Competition was a great success, fostering creativity, engagement, and innovation among students.

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Sree Narayana Guru College of Engineering & Technology (SNGCET), Payyannur, in association with the Women’s Cell and Taal The Beat Dance Club, successfully organized a vibrant Zumba session titled “Move Magic” as part of the Women’s Day celebrations on 6th March 2026 at 2:30 PM. The session was formally inaugurated by the College Principal, marking the official commencement of the event. The Presidential Address was delivered by Dr. Susan Abraham, Dean (UG & PG), who emphasized the importance of women’s empowerment, health, and well-being in today’s dynamic world. The session was led by renowned Zumba instructor Zin Gigina Shinu, who brought immense energy, enthusiasm, and motivation to the program. The event witnessed active participation from students and faculty members, making it a lively and engaging experience for all attendees. The program aimed to promote physical fitness, mental well-being, and the importance of self-care among women. The session began with a brief introduction highlighting the significance of International Women’s Day, followed by an interactive Zumba workout. The instructor skillfully guided participants through various dance routines, ensuring inclusivity for both beginners and experienced participants. The venue was filled with excitement as participants enthusiastically moved to the beats, creating an electrifying atmosphere throughout the session. The initiative was widely appreciated, with participants expressing their interest in more such wellness-oriented programs in the future. The event concluded with a vote of thanks delivered by Abhirosh K, Secretary, Hobby Club, who expressed gratitude to the management, resource person, organizing team, and all participants for contributing to the success of the program. Overall, “Move Magic” was a grand success, effectively combining celebration with fitness and reinforcing the spirit of Women’s Day.

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The Department of Electronics and Communication Engineering, Sree Narayana Guru College of Engineering & Technology (SNGCET), Payyanur, organized a workshop on “Microcontroller Based Prototype Design and MVP Development” on 06 April 2026 at the ECE Seminar Hall.
The session was handled by Mr. Abdulla Mubasher K P, Lead Embedded Engineer at Deepflow Technologies Pvt. Ltd., who shared valuable insights into embedded systems and real-world product development. The workshop focused on guiding students through the process of designing prototypes using microcontrollers and transforming ideas into Minimum Viable Products (MVPs).
Participants gained hands-on exposure to practical implementation, circuit design, and development strategies. The interactive session helped students understand industry practices, problem-solving approaches, and the importance of innovation in engineering.
The workshop proved to be highly informative and engaging, equipping students with essential technical skills and motivating them to explore opportunities in embedded systems and product development.

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The Department of Electronics and Communication Engineering, SNGCET Payyanur, actively participated in Tarang 2026, a National Level Techno-Cultural Fest held at Government Polytechnic College, Kannur, on 12-03-2026 and 13-03-2026. Continuing its vibrant tech journey, the ECE department showcased enthusiasm and talent through participation in various technical and cultural events. The fest provided a dynamic platform for students to explore learning, innovation, and creativity, aligning perfectly with the spirit of engineering excellence.
Students engaged in multiple competitions, workshops, and interactive sessions that enhanced their technical knowledge and practical skills. Events focused on emerging domains such as electronics design, communication systems, and problem-solving challenges encouraged innovative thinking and teamwork. Beyond academics, the cultural programs and networking opportunities created lasting memories and strengthened peer connections. P. Anirudh from S6 ECE, won second in the Karaoke Competition. The exposure to a national-level platform helped students gain confidence, exchange ideas, and understand the competitive landscape. Overall, Tarang 2026 was a remarkable experience for the ECE students, blending learning, innovation, and memorable moments, and contributing significantly to their personal and professional growth.

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The Department of Electronics and Communication Engineering organized an industrial visit to the National Institute of Electronics & Information Technology (NIELIT), Calicut, on 13/03/2026. The visit aimed to provide students with practical exposure to real-world applications of electronics and communication technologies.
During the visit, students were introduced to various advanced laboratories and ongoing projects in areas such as embedded systems, VLSI design, and communication technologies. Experts at NIELIT explained the functioning of modern electronic systems and demonstrated the latest tools and techniques used in the industry.
The interactive sessions with professionals helped students understand industry expectations, current trends, and career opportunities in the electronics and IT sectors. The visit also enhanced their technical knowledge and motivated them to explore innovation and research.
Overall, the industrial visit was highly informative and beneficial, bridging the gap between academic learning and industrial practices.

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The Department of Mechanical Engineering of Sree Narayana Guru College of Engineering & Technology (SNGCET), Payyanur, conducted a Five Days CATIA Workshop from 4th March to 8th March 2026 in the CAD Lab. The workshop was conducted in collaboration with CADD Centre with the objective of enhancing students’ practical knowledge and skills in computer-aided design using CATIA software. It aimed to provide participants with hands-on training in 3D modeling, part design, and assembly, helping them understand industry-level design practices. Students actively participated in the sessions and gained exposure to advanced CAD tools and techniques. The training helped improve their technical competence and confidence in designing mechanical components. The workshop was highly beneficial for students, especially those preparing for careers in design and manufacturing industries. It also supported the department’s initiative to bridge the gap between academic learning and industrial requirements.

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1. Introduction
The Department of Computer Science and Engineering in association with Artificial Intelligence and Data science organized a workshop titled RISC-V in Action : Hands on with RIPES on 06 MARCH 2026 at 09:00 AM to 4:00 PM in the Skill Development Lab. The workshop was conducted in offline mode for S4 CSE and Artificial Intelligence & Data Science (ADS) students. The program aimed to introduce students to the fundamentals of web design and development.
2. Objective of the Event
The main objectives of the workshop were:

• To introduce the basic concepts of RISC-V architecture.
• To familiarize participants with the RIPES simulator environment.
• To understand the execution of assembly programs in RISC-V.
• To demonstrate how instructions move through the processor pipeline.
• To provide practical exposure to register operations, memory access, and instruction execution.

3. Resource Person
The session was handled by Mr. Lomin Joy, Senior Project Engineer , II T Palakkad. The resource person provided a detailed explanation of the concepts involved in RISC-V architecture, including instruction formats, register operations, and processor pipeline stages.
4. Participants
The workshop was attended by S4 Computer Science and Engineering and Artificial Intelligence & Data Science students .The students actively participated in the session and showed great interest in learning about RISC-V architecture and the RIPES simulator. They engaged in hands-on activities, interacted with the resource person, and gained practical exposure to the concepts discussed during the workshop.
5. Description of the Event
The workshop “RISC-V in Action: Hands-on with RIPES” was organized to provide students with practical exposure to modern processor architecture and assembly programming. The session began with an introduction to the RISC-V instruction set architecture, where the resource person explained the basic concepts of processor design, instruction formats, and the role of registers in executing instructions.
The resource person then introduced the RIPES simulator, an educational tool used to visualize and understand how instructions are executed inside a processor. Students were guided through the interface of the simulator, including the register view, memory view, and pipeline visualization. Through demonstrations, the participants learned how instructions move through different stages of the processor pipeline such as Instruction Fetch, Instruction Decode, Execute, Memory Access, and Write Back.
During the hands-on session, students wrote and executed simple RISC-V assembly programs using the RIPES simulator. They observed how the instructions were processed step by step and how the values in registers and memory changed during execution. This practical activity helped the students clearly understand the working of processor components and instruction flow.
The workshop was highly interactive, and students actively participated by asking questions and experimenting with different instructions in the simulator. Overall, the event provided valuable insights into RISC-V architecture and processor simulation, enhancing the students’ understanding of computer architecture concepts.
6. Expected Outcomes
After the workshop, students were able to:

• Students will develop a clear understanding of the fundamentals of RISC-V architecture and its significance in modern processor design.
• Participants will gain hands-on experience using the RIPES simulator for simulating and analyzing instruction execution.
• Students will be able to write and execute basic RISC-V assembly programs.
• Participants will understand the functioning of processor components such as registers, memory, and the instruction pipeline.
• Students will be able to visualize and analyze the different stages of instruction execution, including Instruction Fetch, Decode, Execute, Memory Access, and Write Back.
• The workshop will enhance problem-solving skills and improve conceptual knowledge in computer architecture.
• Participants will gain confidence in working with low-level programming and simulation tools.

7. Programme Outcomes Addressed
The workshop supported the following Programme Outcomes:

• PO1 – Engineering Knowledge: Application of fundamental concepts of RISC-V architecture to understand processor design and instruction execution.
• PO2 – Problem Analysis: Ability to analyze and interpret problems related to instruction flow, register usage, and pipeline behavior in computer architecture.
• PO3 – Design / Development of Solutions: Development of simple assembly-level programs and solutions using RISC-V instructions.
• PO4 – Conduct Investigations of Complex Problems: Use of the RIPES simulator to simulate, observe, and investigate processor operations and instruction execution.
• PO12 – Lifelong Learning: Encouragement to continuously update knowledge in emerging technologies such as processor architecture and open instruction set systems.

8. Feedback and Evaluation
Feedback forms were collected from the participants and the resource person. The feedback analysis indicated that the workshop was informative, interactive, and beneficial for beginners in web development.
9. Conclusion
The workshop enhanced students’ understanding of RISC-V architecture through hands-on experience with the RIPES simulator, improving their practical skills and conceptual knowledge.
10. Event Coordinators

• Ms. Athira Balachandran
• Ms. Vismaya Vijayan
• Ms. Nirupama Kannan

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